Semiconductor devices - Mechanical and climatic test methods - Part 34: Power cycling

IEC 60749-34:2010 describes a test method used to determine the resistance of a semiconductor device to thermal and mechanical stresses due to cycling the power dissipation of the internal semiconductor die and internal connectors. This happens when low-voltage operating biases for forward conduction (load currents) are periodically applied and removed, causing rapid changes of temperature. The power cycling test is intended to simulate typical applications in power electronics and is complementary to high temperature operating life (see IEC 60749-23). Exposure to this test may not induce the same failure mechanisms as exposure to air-to-air temperature cycling, or to rapid change of temperature using the two-fluid-baths method. This test causes wear-out and is considered destructive. This second edition cancels and replaces the first edition published in 2004 and constitutes a technical revision. The significant changes with respect from the previous edition include:

- the specification of tighter conditions for more accelerated power cycling in the wire bond fatigue mode;

- information that under harsh power cycling conditions high current densities in a thin die metalization m